View MMSF3350D_462898.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MMSF3350/D
Advance Information
WaveFETTM
Power Surface Mount Products
MMSF3350
TM
HDTMOS Single N-Channel Field Effect Transistor
WaveFETTM devices are an advanced series of power MOSFETs which utilize Motorola's latest MOSFET technology process to achieve the lowest possible on-resistance per silicon area. They are capable of withstanding high energy in the avalanche and commutation modes and the drain-to-source diode has a very low reverse recovery time. WaveFETTM devices are designed for use in low voltage, high speed switching applications where power efficiency is important. Typical applications are dc-dc converters, and power management in portable and battery powered products such as computers, printers, cellular and cordless phones. They can also be used for low voltage motor controls in mass storage products such as disk drives and tape drives. The avalanche energy is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. * Characterized Over a Wide Range of Power Ratings * Ultralow RDS(on) Provides Higher Efficiency and Extends Battery Life in Portable Applications * Logic Level Gate Drive -- Can Be Driven by Logic ICs * Diode Is Characterized for Use In Bridge Circuits * Diode Exhibits High Speed, With Soft Recovery * IDSS Specified at Elevated Temperature * Avalanche Energy Specified * Miniature SO-8 Surface Mount Package -- Saves Board Space
D
SINGLE TMOS POWER MOSFET 30 VOLTS RDS(on) = 11 mW
CASE 751- 06, Style 12 SO-8
Source Source Source Gate G
1 2 3 4
8 7 6 5
Drain Drain Drain Drain
TOP VIEW S
MAXIMUM RATINGS (TJ = 25C unless otherwise specified)
Parameter Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Gate-to-Source Operating Voltage Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy -- Starting TJ = 25C (VDD = 25 Vdc, VGS = 10 Vdc, L = 20 mH, IL(pk) = 10 A, VDS = 30 Vdc) Symbol VDSS VDGR VGS VGS TJ, Tstg EAS Value 30 30 20 16 - 55 to 150 1000 Unit Vdc Vdc Vdc Vdc C mJ
DEVICE MARKING
S3350 Device MMSF3350R2
ORDERING INFORMATION
Reel Size 13 Tape Width 12 mm embossed tape Quantity 2500 units
This document contains information on a new product. Specifications and information herein are subject to change without notice.
HDTMOS and WaveFET are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Thermal Clad is a trademark of the Bergquist Company.
REV 1
(c)Motorola TMOS Power MOSFET Transistor Device Data Motorola, Inc. 1998
1
MMSF3350
POWER RATINGS (TJ = 25C unless otherwise specified)
Parameter Drain Current -- Continuous @ TA = 25C Drain Current -- Continuous @ TA = 100C Drain Current -- Single Pulse (tp 10 ms) Continuous Source Current (Diode Conduction) Total Power Dissipation @ TA = 25C Linear Derating Factor Thermal Resistance -- Junction-to-Ambient Mounted on 1 inch square FR-4 or G10 board VGS = 10 Vdc t 10 seconds RJA Parameter Drain Current -- Continuous @ TA = 25C Drain Current -- Continuous @ TA = 100C Drain Current -- Single Pulse (tp 10 ms) Continuous Source Current (Diode Conduction) Total Power Dissipation @ TA = 25C Linear Derating Factor Thermal Resistance -- Junction-to-Ambient Mounted on 1 inch square FR-4 or G10 board VGS = 10 Vdc Steady State RJA Parameter Drain Current -- Continuous @ TA = 25C Drain Current -- Continuous @ TA = 100C Drain Current -- Single Pulse (tp 10 ms) Continuous Source Current (Diode Conduction) Total Power Dissipation @ TA = 25C Linear Derating Factor Thermal Resistance -- Junction-to-Ambient Mounted on minimum recommended FR-4 or G10 board VGS = 10 Vdc t 10 seconds RJA Parameter Drain Current -- Continuous @ TA = 25C Drain Current -- Continuous @ TA = 100C Drain Current -- Single Pulse (tp 10 ms) Continuous Source Current (Diode Conduction) Total Power Dissipation @ TA = 25C Linear Derating Factor Thermal Resistance -- Junction-to-Ambient Mounted on minimum recommended FR-4 or G10 board VGS = 10 Vdc Steady State RJA Symbol ID ID IDM IS PD Symbol ID ID IDM IS PD Symbol ID ID IDM IS PD Symbol ID ID IDM IS PD Value 13 9.2 50 3.6 2.7 22.2 46 Unit Adc Adc Adc Adc Watts mW/C C/W
Value 9.4 6.7 50 2.0 1.5 11.8 85
Unit Adc Adc Adc Adc Watts mW/C C/W
Value 10 7.4 50 2.4 1.8 14.3 70
Unit Adc Adc Adc Adc Watts mW/C C/W
Value 7.4 5.2 50 1.2 0.9 7.1 140
Unit Adc Adc Adc Adc Watts mW/C C/W
2
Motorola TMOS Power MOSFET Transistor Device Data
MMSF3350
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 30 Vdc, VGS = 0 Vdc) (VDS = 30 Vdc, VGS = 0 Vdc, TJ = 125C) Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS(1) Gate Threshold Voltage (VDS = VGS, ID = 250 mAdc) Threshold Temperature Coefficient (Negative) Static Drain-to-Source On-Resistance (VGS = 10 Vdc, ID = 10 Adc) (VGS = 4.5 Vdc, ID = 5.0 Adc) Forward Transconductance (VDS = 15 Vdc, ID = 10 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS(2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge ( (VDS = 15 Vd , ID = 2 0 Ad , Vdc, 2.0 Adc, VGS = 10 Vdc) Vdc, 1.0 Adc, (VDD = 25 Vd ID = 1 0 Ad VGS = 10 Vdc Vdc, RG = 6.0 ) ) Vdc, 1.0 Adc, (VDD = 25 Vd ID = 1 0 Ad VGS = 4.5 Vdc, 4 5 Vdc RG = 6.0 ) ) td(on) tr td(off) tf td(on) tr td(off) tf QT Q1 Q2 Q3 SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage (1) (IS = 2.3 Adc, VGS = 0 Vdc) (IS = 2.3 Adc, VGS = 0 Vdc, TJ = 125C) Reverse Recovery Time ( (IS = 3 5 Ad , VGS = 0 Vdc, 3.5 Adc, Vd , dIS/dt = 100 A/s) Reverse Recovery Stored Charge (1) Pulse Test: Pulse Width 300 s, Duty Cycle 2%. (2) Switching characteristics are independent of operating junction temperatures. -- -- -- -- -- -- -- -- -- -- -- -- 21 50 42 44 12 15 60 44 46 4.5 12.8 9.8 40 90 80 80 20 30 100 80 60 -- -- -- nC ns ns (VDS = 24 Vdc, VGS = 0 Vdc, Vdc Vdc f = 1.0 MHz) Ciss Coss Crss -- -- -- 1680 540 185 -- -- -- pF VGS(th) 1.0 -- RDS(on) -- -- gFS 12 9.4 14.4 17 11 17 -- Mhos 2.0 4.6 -- -- Vdc mV/C m V(BR)DSS 30 -- IDSS -- -- IGSS -- 0.003 0.4 2.0 1.0 10 100 nAdc 33 23 -- -- Vdc mV/C Adc Symbol Min Typ Max Unit
VSD -- -- trr ta tb QRR -- -- -- -- 0.76 0.58 41 21 20 0.049 1.0 -- -- -- -- --
Vdc
ns
C
Motorola TMOS Power MOSFET Transistor Device Data
3
MMSF3350
TYPICAL ELECTRICAL CHARACTERISTICS
25 10 V ID , DRAIN CURRENT (AMPS) 6.0 V 20 4.5 V 4.3 V 15 3.5 V 10 3.3 V 5 0 0 0.25 1.5 1.75 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 0.5 0.75 1.0 1.25 2.0 3.1 V 2.9 V 2 0 2 2.5 3 3.5 4 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) VGS = 3.7 V 4.1 V 3.9 V TJ = 25C ID, DRAIN CURRENT (AMPS) 12 10 8 TJ = 125C 6 4 - 55C 25C 14 VDS 10 V
Figure 1. On-Region Characteristics
RDS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS) RDS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS)
Figure 2. Transfer Characteristics
0.3 ID = 5.0 A TJ = 25C 0.2
0.020 0.018 0.016 0.014 0.012 0.010 0.008 0.006 0.004 0.002 0 0 5 15 10 ID, DRAIN CURRENT (AMPS) 20 25 10 V TJ = 25C VGS = 4.5 V
0.1
0 2 3 4 5 6 7 8 9 10 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 3. On-Resistance versus Gate-To-Source Voltage
Figure 4. On-Resistance versus Drain Current and Gate Voltage
RDS(on) , DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
2.0 VGS = 10 V ID = 10 A 1.5
1000 VGS = 0 V 100 IDSS , LEAKAGE (nA) 100C 10 TJ = 125C
1.0
0.5
1
25C
0 - 50
0.1 - 25 0 25 50 75 100 125 150 5 TJ, JUNCTION TEMPERATURE (C) 10 15 20 25 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 30
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-To-Source Leakage Current versus Voltage
4
Motorola TMOS Power MOSFET Transistor Device Data
MMSF3350
POWER MOSFET SWITCHING
Switching behavior is most easily modeled and predicted by recognizing that the power MOSFET is charge controlled. The lengths of various switching intervals (t) are determined by how fast the FET input capacitance can be charged by current from the generator. The published capacitance data is difficult to use for calculating rise and fall because drain-gate capacitance varies greatly with applied voltage. Accordingly, gate charge data is used. In most cases, a satisfactory estimate of average input current (IG(AV)) can be made from a rudimentary analysis of the drive circuit so that t = Q/IG(AV) During the rise and fall time interval when switching a resistive load, VGS remains virtually constant at a level known as the plateau voltage, VSGP. Therefore, rise and fall times may be approximated by the following: tr = Q2 x RG/(VGG - VGSP) tf = Q2 x RG/VGSP where VGG = the gate drive voltage, which varies from zero to VGG RG = the gate drive resistance and Q2 and VGSP are read from the gate charge curve. During the turn-on and turn-off delay times, gate current is not constant. The simplest calculation uses appropriate values from the capacitance curves in a standard equation for voltage change in an RC network. The equations are: td(on) = RG Ciss In [VGG/(VGG - VGSP)] td(off) = RG Ciss In (VGG/VGSP) The capacitance (Ciss) is read from the capacitance curve at a voltage corresponding to the off-state condition when calculating td(on) and is read at a voltage corresponding to the on-state when calculating td(off). At high switching speeds, parasitic circuit elements complicate the analysis. The inductance of the MOSFET source lead, inside the package and in the circuit wiring which is common to both the drain and gate current paths, produces a voltage at the source which reduces the gate drive current. The voltage is determined by Ldi/dt, but since di/dt is a function of drain current, the mathematical solution is complex. The MOSFET output capacitance also complicates the mathematics. And finally, MOSFETs have finite internal gate resistance which effectively adds to the resistance of the driving source, but the internal resistance is difficult to measure and, consequently, is not specified. The resistive switching time variation versus gate resistance (Figure 9) shows how typical switching performance is affected by the parasitic circuit elements. If the parasitics were not present, the slope of the curves would maintain a value of unity regardless of the switching speed. The circuit used to obtain the data is constructed to minimize common inductance in the drain and gate circuit loops and is believed readily achievable with board mounted components. Most power electronic loads are inductive; the data in the figure is taken with a resistive load, which approximates an optimally snubbed inductive load. Power MOSFETs may be safely operated into an inductive load; however, snubbing reduces switching losses.
4000 Ciss 3500 C, CAPACITANCE (pF) 3000 2500 2000 1500 1000 500 0 -10 -5 0 5 VGS VDS Crss 10 15 20 25 Coss VDS = 0 V Crss Ciss VGS = 0 V TJ = 25C
30
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
Motorola TMOS Power MOSFET Transistor Device Data
5
MMSF3350
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 12 QT 10 VGS 8 6 4 Q1 2 0 0 10 20 Q3 VDS 30 40 50 Qg, TOTAL GATE CHARGE (nC) Q2 TJ = 25C ID = 2 A 12 9 6 3 0 15 18 VDS , DRAIN-TO-SOURCE VOLTAGE (VOLTS) 1000
td(off) t, TIME (ns) tf 100 tr td(on)
10 1 10 RG, GATE RESISTANCE (OHMS) 100
Figure 8. Gate-To-Source and Drain-To-Source Voltage versus Total Charge
Figure 9. Resistive Switching Time Variation versus Gate Resistance
DRAIN-TO-SOURCE DIODE CHARACTERISTICS
The switching characteristics of a MOSFET body diode are very important in systems using it as a freewheeling or commutating diode. Of particular interest are the reverse recovery characteristics which play a major role in determining switching losses, radiated noise, EMI and RFI. System switching losses are largely due to the nature of the body diode itself. The body diode is a minority carrier device, therefore it has a finite reverse recovery time, trr, due to the storage of minority carrier charge, QRR, as shown in the typical reverse recovery wave form of Figure 16. It is this stored charge that, when cleared from the diode, passes through a potential and defines an energy loss. Obviously, repeatedly forcing the diode through reverse recovery further increases switching losses. Therefore, one would like a diode with short trr and low QRR specifications to minimize these losses. The abruptness of diode reverse recovery effects the amount of radiated noise, voltage spikes, and current ringing. The mechanisms at work are finite irremovable circuit parasitic inductances and capacitances acted upon by high
12 10 8 6 4 2 0 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) VGS = 0 V TJ = 25C
di/dts. The diode's negative di/dt during ta is directly controlled by the device clearing the stored charge. However, the positive di/dt during tb is an uncontrollable diode characteristic and is usually the culprit that induces current ringing. Therefore, when comparing diodes, the ratio of tb/ta serves as a good indicator of recovery abruptness and thus gives a comparative estimate of probable noise generated. A ratio of 1 is considered ideal and values less than 0.5 are considered snappy. Compared to Motorola standard cell density low voltage MOSFETs, high cell density MOSFET diodes are faster (shorter trr), have less stored charge and a softer reverse recovery characteristic. The softness advantage of the high cell density diode means they can be forced through reverse recovery at a higher di/dt than a standard cell MOSFET diode without increasing the current ringing or the noise generated. In addition, power dissipation incurred from switching the diode will be less due to the shorter recovery time and lower switching losses.
I S , SOURCE CURRENT (AMPS)
Figure 10. Diode Forward Voltage versus Current
6
Motorola TMOS Power MOSFET Transistor Device Data
MMSF3350
di/dt = 300 A/s I S , SOURCE CURRENT Standard Cell Density trr High Cell Density trr tb ta
t, TIME
Figure 11. Reverse Recovery Time (trr)
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define the maximum simultaneous drain-to-source voltage and drain current that a transistor can handle safely when it is forward biased. Curves are based upon maximum peak junction temperature and a case temperature (TC) of 25C. Peak repetitive pulsed power limits are determined by using the thermal response data in conjunction with the procedures discussed in AN569, "Transient Thermal Resistance - General Data and Its Use." Switching between the off-state and the on-state may traverse any load line provided neither rated peak current (IDM) nor rated voltage (VDSS) is exceeded, and that the transition time (tr, tf) does not exceed 10 s. In addition the total power
100 EAS , SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) ID , DRAIN CURRENT (AMPS) 10 ms 10 dc 1 ms 100 ms
averaged over a complete switching cycle must not exceed (TJ(MAX) - TC)/(RJC). A power MOSFET designated E-FET can be safely used in switching circuits with unclamped inductive loads. For reliable operation, the stored energy from circuit inductance dissipated in the transistor while in avalanche must be less than the rated limit and must be adjusted for operating conditions differing from those specified. Although industry practice is to rate in terms of energy, avalanche energy capability is not a constant. The energy rating decreases non-linearly with an increase of peak current in avalanche and peak junction temperature.
1000 900 800 700 600 500 400 300 200 100 0 100 25 50 75 100 125 150 ID = 10 A
1
0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 10 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
0.01
TJ, STARTING JUNCTION TEMPERATURE (C)
Figure 12. Maximum Rated Forward Biased Safe Operating Area
Figure 13. Maximum Avalanche Energy versus Starting Junction Temperature
Motorola TMOS Power MOSFET Transistor Device Data
7
MMSF3350
TYPICAL ELECTRICAL CHARACTERISTICS
1000 MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE DUTY CYCLE 100 0.2 0.1 0.05 0.02 0.01 P(pk) t2 DUTY CYCLE, D = t1/t2 1E-02 1E-01 t, TIME (seconds) 1E+00 t1 RJA(t) = r(t) RJA D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TA = P(pk) RJA(t) 1E+02 1E+03 D = 0.5
10
1
SINGLE PULSE 0.1 1E-05 1E-04 1E-03
1E+01
Figure 14. Thermal Response -- Various Duty Cycles
10,000 Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE MIN PAD, ja 1 INCH PAD, ja MIN PAD, jl R C R C R C 1.07 0.0707 0.417 0.0866 0.0142 0.0758 0.106 16.9 0.558 1.12 3.10 0.456 1.59 276 6.61 11.0 46.7 4.95 289 1090 5.64 60.8 318 31.6 9,580 13,600 45.4 63.8 12,500 3.95 R1 CHIP JUNCTION C1 R2 C2 R3 C3 R4 C4 R5 C5 AMBIENT Rthja, MIN PAD Rthja, 1 INCH PAD 10 Rthjl, MIN PAD
1000
100
1 2 3 4 5
1 1E-03 1E-02 1E-01 1E+00 t, TIME (seconds) 1E+01 1E+02 1E+03
Figure 15. Thermal Response -- Various Mounting/Measurement Conditions
80 MOUNTED ON 2 SQ. FR4 BOARD (1 SQ. 2 OZ. CU 0.06 THICK SINGLE SIDED). 60 POWER (W) di/dt 40 IS trr 20 tp 0.01 0.1 t, TIME (seconds) 1 10 IS ta tb TIME 0.25 IS
0
Figure 16. Single Pulse Power
Figure 17. Diode Reverse Recovery Waveform
8
Motorola TMOS Power MOSFET Transistor Device Data
MMSF3350
INFORMATION FOR USING THE SO-8 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self-align when subjected to a solder reflow process.
0.060 1.52
0.275 7.0
0.155 4.0
0.024 0.6
0.050 1.270
inches mm
SO-8 POWER DISSIPATION
The power dissipation of the SO-8 is a function of the input pad size. This can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient; and the operating temperature, TA. Using the values provided on the data sheet for the SO-8 package, PD can be calculated as follows: PD = TJ(max) - TA RJA the equation for an ambient temperature TA of 25C, one can calculate the power dissipation of the device which in this case is 2.7 Watts. 150C - 25C = 2.7 Watts 46C/W
PD =
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into
The 46C/W for the SO-8 package assumes the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 2.7 Watts using the footprint shown. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal CladTM. Using board material such as Thermal Clad, the power dissipation can be doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. * Always preheat the device. * The delta temperature between the preheat and soldering should be 100C or less.* * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10C.
* The soldering temperature and time shall not exceed * When shifting from preheating to soldering, the maximum * After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. * Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. temperature gradient shall be 5C or less. 260C for more than 10 seconds.
Motorola TMOS Power MOSFET Transistor Device Data
9
MMSF3350
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones and a figure for belt speed. Taken together, these control settings make up a heating "profile" for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 1 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems, but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177 -189C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints.
STEP 1 PREHEAT ZONE 1 "RAMP" 200C
STEP 2 STEP 3 VENT HEATING "SOAK" ZONES 2 & 5 "RAMP"
DESIRED CURVE FOR HIGH MASS ASSEMBLIES 150C
STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 "SPIKE" "SOAK" 170C 160C
STEP 6 VENT
STEP 7 COOLING 205 TO 219C PEAK AT SOLDER JOINT
150C SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY)
100C 100C
140C
DESIRED CURVE FOR LOW MASS ASSEMBLIES 50C
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 18. Typical Solder Heating Profile
10
Motorola TMOS Power MOSFET Transistor Device Data
MMSF3350
PACKAGE DIMENSIONS
A
8
D
5
C
E
1 4
H
0.25
M
B
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN
h B C e A
SEATING PLANE
X 45 _
q
L 0.10 A1 B 0.25
M
q
CB
S
A
S
CASE 751-06 ISSUE T
STYLE 12: PIN 1. 2. 3. 4. 5. 6. 7. 8.
Motorola TMOS Power MOSFET Transistor Device Data
11
MMSF3350
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 1-303-675-2140 or 1-800-441-2447 Customer Focus Center: 1-800-521-6274 MfaxTM: RMFAX0@email.sps.mot.com - TOUCHTONE 1-602-244-6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, Motorola Fax Back System - US & Canada ONLY 1-800-774-1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 - http://sps.motorola.com/mfax/ HOME PAGE: http://motorola.com/sps/ JAPAN: Nippon Motorola Ltd.; SPD, Strategic Planning Office, 141, 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan. 81-3-5487-8488
12
MMSF3350/D Motorola TMOS Power MOSFET Transistor Device Data

▲Up To Search▲

Price & Availability of MMSF3350D

	To Download MMSF3350D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .